The objective of this project is to develop enabling technologies for low-cost single-chip CMOS passive RFID tags in the UHF frequency range from 860 MHz to 960MHz. First, enabling technologies for passive RFID tags, including antennas, power management, ultra-low-energy digital design, non-volatile memory and packaging - will be investigated. Second, these enabling technologies will be integrated for a low-cost solution. In parallel, suitable system architectures and building blocks for single-chip RFID readers will also be designed and demonstrated, including RFIC transceiver and baseband.
The project will provide RFID industry in Hong Kong and China not only with the intellectual properties (IP's) on IC modules and systems for RFID readers and tags for technology transfer but also with well-trained IC designers for future product definition and development.